1. Field of the Invention
The present invention relates to a semiconductor storage device. In particular, the present invention relates to a semiconductor storage device in a signal processing unit, which can keep a stored logic state even when power is turned off.
2. Description of the Related Art
A signal processing unit such as a central processing unit (CPU) has a variety of configurations depending on its application. The signal processing unit is generally provided with some kinds of storage devices such as a register and a cache memory in addition to a main memory for storing data or a program. A register has a function of temporarily holding a data signal for carrying out arithmetic processing, holding a program execution state, or the like. Meanwhile, a cache memory, which is located between an arithmetic unit and a main memory, is provided to reduce low-speed access to the main memory and to speed up the arithmetic processing.
In a storage device, such as a register or a cache memory, of a signal processing unit, writing of a data signal needs to be performed at higher speed than in a main memory. In general, a flip-flop, a static random access memory (SRAM), or the like is used as a register or a cache memory. That is, a volatile storage device in which a data signal is lost when the supply of power supply voltage is stopped is used for such a register, a cache memory, or the like.
In order to reduce power consumption, a method for temporarily stopping the supply of power supply voltage to a signal processing unit during a period in which a data signal is not input and output has been suggested (for example, see Patent Document 1). In the method disclosed in Patent Document 1, a nonvolatile storage device is located in the periphery of a volatile storage device, so that the data signal is temporarily stored in the nonvolatile storage device when the supply of power supply voltage is stopped.
Reference
    [Patent Document 1] Japanese Published Patent Application No. 2010-124290